1. Field of the Invention
The invention relates in general to a level shifter, and more particularly to a level shifter manufactured according to Low Temperature Poly-Silicon technology.
2. Description of the Related Art
The Low Temperature Poly-Silicon (LTPS) manufacturing technology of display is featured by integrating peripheral circuits and manufacturing directly on the glass substrate, so that signal transmission is sped up and a higher resolution is achieved. However, the LTPS technology is more complicated than amorphous silicon (a-Si) manufacturing process, hence resulting in a decrease in production efficiency and an increase in manufacturing costs. The key element of LTPS is more in terms of Complementary Metal-Oxide Semiconductor (CMOS). If the CMOS transistor is replaced by a P channel Metal-Oxide Semiconductor (PMOS) transistor, the number of masks used can be reduced and the manufacturing process can be further simplified.
In order to integrate the circuits and reduce the costs, applying the circuits whose design incorporates PMOS transistors to the LTPS manufacturing technology has become a focus in today's design of display, and level shifter is one of the circuits used in the display. Referring to FIG. 1, a conventional level shifter is shown. An output signal Output is generated according to a voltage VDD (0 V), a VSB (−20 V), a VSS (−30 V), a VSA (−15 V), and an input signal Input. The oscillation of the input signal Input ranges from 0 to −10 V, while the oscillation of the output signal Output ranges from 0 to −20 V. For the oscillation of the output signal Output to range from 0 to −20 V, a voltage VSS of −30 V and a voltage VSA of −15 V are further added. However, adding an even negative voltage leads to additional power consumption, and is not as practical as expected.
Referring to FIG. 2, another conventional level shifter is shown. The level shifter includes several transistors T1, T2, T3, T4, T5, T6, T7, T8, T9 and T10, wherein each of the transistors T1 to T10 has a drain D, a source S, and a gate G. The level shifter of FIG. 2, which is divided into an input stage, a switch stage, and an output stage, generates voltages V1, V2, V3 and V4 to be applied onto the circuits of various stages according to voltages VSS and VDD, and the functions of input signals In1 and In2. When functioning, the transistors T7 and T8 form a current path from the voltage VDD to the voltage VSS, and generates a static current, hence resulting in lasting power consumption. The transistors T1 and T2 as well as the transistors T3 and T4 also have the same problems.
However, if the above level shifter is applied in a portable electronic product such as the display panel of a mobile phone, the disadvantage of power consumption will shorten battery duration, jeopardizing the competitive power of the electronic product.